Von Neumann architecture, registers and buses

The stored-program idea

In a von Neumann machine, instructions and data are held in the same memory and travel on the same buses. That is what makes a computer general-purpose — change the program, change the machine. It is also the source of the von Neumann bottleneck: the processor cannot fetch an instruction and its data at the same instant.

Inside the CPU

The control unit decodes instructions and generates the timing signals. The ALU performs arithmetic and logic. Registers, each with one job:

• PC (program counter) holds the address of the next instruction.
• MAR (memory address register) holds the address being accessed.
• MDR (memory data register) holds the data or instruction just fetched, or about to be written.
• CIR (current instruction register) holds the instruction being executed.
• ACC (accumulator) holds the result of ALU operations.
• Status register holds flags such as carry, negative and overflow.

Three buses

The address bus is unidirectional and its width sets the maximum addressable memory ($n$ lines address $2^n$ locations). The data bus is bidirectional and its width sets how many bits move per transfer. The control bus carries signals such as read, write, clock and interrupt request.

What actually makes a processor faster

Clock speed, number of cores, cache size and word length all contribute, and each has a limit. More cores only help software written to use them; a larger cache helps until the working set fits; a faster clock produces more heat. Exam answers must name the limit, not just the benefit.